GROUP1INT=DISABLE, FLASHREG=DISABLED, IOCON=DISABLE, WWDT=DISABLE, CRC=DISABLE, ROM=DISABLE, CT32B1=DISABLE, CT16B1=DISABLE, FLASHARRAY=DISABLED, USBSRAM=DISABLE, USART2=DISABLE, GPIO=DISABLE, PINT=DISABLE, CT32B0=DISABLE, CT16B0=DISABLE, GROUP0INT=DISABLE, RAM1=DISABLE, ADC=DISABLE, SSP1=DISABLE, I2C0=DISABLE, USART3_4=DISABLE, I2C1=DISABLE, USART1=DISABLE, SSP0=DISABLE, USART0=DISABLE, DMA=DISABLE, SCT0_1=DISABLE, RAM0=DISABLE, RTC=DISABLE
System clock control
| SYS | This bit is read-only and always reads as 1. It configures the always-on clock for the AHB, the APB bridges, the Cortex-M0 core clocks, SYSCON, reset control, SRAM0, and the PMU. Writes to this bit are ignored. |
| ROM | Enables clock for ROM. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RAM0 | Enables clock for Main SRAM0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| FLASHREG | Enables clock for flash register interface. 0 (DISABLED): Disabled 1 (ENABLED): Enabled |
| FLASHARRAY | Enables clock for flash access. 0 (DISABLED): Disabled 1 (ENABLED): Enabled |
| I2C0 | Enables clock for I2C. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| GPIO | Enables clock for GPIO port registers. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CT16B0 | Enables clock for 16-bit counter/timer 0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CT16B1 | Enables clock for 16-bit counter/timer 1. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CT32B0 | Enables clock for 32-bit counter/timer 0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CT32B1 | Enables clock for 32-bit counter/timer 1. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| SSP0 | Enables clock for SSP0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| USART0 | Enables clock for USART0. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| ADC | Enables clock for ADC. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RESERVED | Reserved |
| WWDT | Enables clock for WWDT. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| IOCON | Enables clock for I/O configuration block. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RESERVED | Reserved |
| SSP1 | Enables clock for SSP1. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| PINT | Enables clock to GPIO Pin interrupt register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| USART1 | Enables clock to USART1 register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| USART2 | Enables clock to USART2 register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| USART3_4 | Enables clock to USART3 and USART4 register interfaces. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| GROUP0INT | Enables clock to GPIO GROUP0 interrupt register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| GROUP1INT | Enables clock to GPIO GROUP1 interrupt register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| I2C1 | Enables clock for I2C1. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RAM1 | Enables clock for SRAM1 located at 0x2000 0000 to 0x2000 0800. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| USBSRAM | Enables USB SRAM/SRAM2 block located at 0x2000 4000 to 0x2000 4800. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| CRC | Enables clock for CRC. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| DMA | Enables clock for DMA. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| RTC | Enables clock for RTC register interface. 0 (DISABLE): Disable 1 (ENABLE): Enable |
| SCT0_1 | Enables clock for SCT0 and SCT1. 0 (DISABLE): Disable 1 (ENABLE): Enable |